TELECOMMUNICATIONS AND RADIO ENGINEERING - 2011 Vol. 70,
No 15
 

 

 

 

A LOW VOLTAGE-TYPE SENSE AMPLIFIER DESIGN FOR EEPROM MEMORY



L.F. Rahman, M.B.I. Reaz, & M.A.M. Ali
Department of Electrical, Electronic and Systems Engineering
University Kebangsaan Malaysia
43600 UKM, Bangi, Selangor, Malaysia
Address all correspondence to M. B. I. Reaz E-mail: mamun.reaz@gmail.com

Abstract
To ensure both the reduced reading power and the enhanced reliability of the nonvolatile memories like EEPROM embedded in RFID transponders, a new low voltage-type sense amplifier (SA) is designed. The topology of the designed sense amplifier uses a voltage sensing method, with low cost, low power consumption as well as high reliability. The sense amplifier was designed in CEDEC 0.18-?m CMOS embedded EEPROM process with the 3.7 V power supply. Simulation results showed that the circuit is able to operate between 1 V to 3.7 V within the temperature range from -250 C to 1250 C. The novel topology allows the circuit to function with power supplies as low as 1 V. The simulations show that the new voltage-type sense amplifier required lower voltage than the previously reported voltage-type sense amplifier by Liu et al. Additionally the MOS size used for this circuit is 0.18-?m, which reduced the size of the circuit.
KEY WORDS:images recognition and classification, structural-hierarchical methods, structural description, principle of voting, compression of description, calculation expenses, probability of correct classification

References

  1. Barnett, R.E. and Jin, L., (2008), An EEPROM Programming Controller for Passive UHF RFID Transponders With Gated Clock Regulation Loop and Current Surge Control, IEEE Journal of Solid-State Circuits, 43(8):1808-1815.
  2. Glidden, R, Bockorick, C, Cooper, S, et al., (2004), Design of ultra-low-cost UHF RFID tags for supply chain applications, Communications Magazine, IEEE, 42(8):140-151.
  3. Liu, D.S., Zou, X.C., Zhang, F., et al., (2006), Embedded EEPROM Memory Achieving Lower Power - New design of EEPROM memory for RFID tag IC, Circuits and Devices Magazine, IEEE, 22(6):53-59.
  4. Daga, J.M., Papaix, C., Merandat, M., et al., (2003), Design techniques for EEPROMs embedded in portable systems on chips, IEEE Design & Test of Computers, 20(1):68-75.
  5. Micheloni, R., Crippa, L., Sangalli, M., et al., (2003), The flash memory read path: building blocks and critical aspects, Proceedings of the IEEE, 91(4):537-553.
  6. Otsuka, N. and Horowitz, M.A., (1997), Circuit techniques for 1.5-V power supply flash memory, IEEE Journal of Solid-State Circuits, 32(8):1217-1230.
  7. LI Ming, KANG JinFeng and WANG YangYuan, (2010), A novel voltage-type sense amplfier for low-power nonvolatile memories, Science China Information Sciences, 53(8):1676-1681.
  8. Dong-sheng LIU, Xue-cheng ZOU, Qiong YU and Fan ZHANG, (2009), New design of sense amplifier for EEPROM memory, Journal of Zhejiang University Science A, 2:179-183.
  9. Huang, R., Zhou, F.L., Cai, Y.M., et al., (2008), Novel vertical channel double gate structures for high density and low power flash memory applications, Science China Series F: Information Sciences, 51:799–806, 2008.
  10. Canet, P., Lalande, F., Razafindramora, J., (2004), Integrated Reliability in EEPROM Nonvolatile Memory Cell Design, Proceedings of the Non-volatile Memory Technology Symposium, L2MP-polytech UMR, Marseille, France, pp.66-69.


pages 1379-1385

Back